1. Field of the Invention
The invention relates to a semiconductor component having a semiconductor substrate and at least one transistor embodied on the semiconductor substrate with first, second and third electrode terminal connection regions, formed on a main surface of the semiconductor substrate and electrically insulated from one another, one of which is associated with the gate terminal or base terminal, one is associated with the source terminal or emitter terminal, and one is associated with the drain terminal or collector terminal of the at least one transistor, each electrode terminal connection region being formed of at least one finger section and one contact area section electrically conductively connected to the associated finger section. In particular, the at least one finger section has a longitudinal extent that is considerably larger than the extent widthwise, the area of the contact area section is enlarged considerably over the area of each individual finger section of the electrode terminal connection region, and the finger sections of the electrode terminal connection regions are arranged on the semiconductor substrate, aligned at least approximately parallel to one another.
In previously known GaAs field effect transistors with multi-finger configuration, and in particular those for high-frequency applications, a row of drain bond pads is typically provided on one side of the actual active FET region, and a row of gate bond pads and a row of source via holes (metallized holes through the semi-insulating substrate for through-plating to the back side) are provided in alternation on the other side. Such a configuration is described for instance in the data sheets NE 9004 (NEC) JS8855-AS (Toshiba), CFX 91 (Philips), and FLR056XV (Fujitsu), and are described in further detail below in conjunction with the schematic plan view shown in FIG. 1 of the drawing. The purpose of such a configuration is to obtain the smallest possible inductance in the connection with the external circuit, particularly with a view to the negative-feedback source inductance, which otherwise negatively affects the high-frequency performance.
It is accordingly an object of the invention to provide a semiconductor component, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which, while requiring slightly more space, enables increased electrical conductivity and current-carrying capacity, particularly of the finger sections, and at the same time a decrease in the effective heat resistance and a pronounced increase in the parasitic source inductance or emitter inductance.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor component, comprising:
a semiconductor substrate having a main surface;
at least one transistor formed on the semiconductor substrate with a gate or base terminal, with a source or emitter terminal, and with a drain or collector terminal;
first, second and third electrode terminals formed on the main surface of the semiconductor substrate and electrically insulated from one another, the electrode terminals being respectively associated with the gate or base terminal, with the source or emitter terminal, and with the drain or collector terminal of the at least one transistor;
each of the electrode terminals being formed with at least one finger section and a first contact area section electrically connected to a respective the finger section and being disposed laterally thereof; and
at least one of the electrode terminals having a second contact area section electrically connected to the respective the finger section and being disposed laterally opposite the first contact area section across the finger section.
In other words, the semiconductor component according to the invention is distinguished in that at least one electrode terminal connection region, whose contact area section is disposed on one side of the finger sections, has a further contact area section electrically connected to the associated finger section. The further contact area section is disposed on the opposite side of the finger sections. The further contact area sections advantageously have an area that is enlarged compared with each individual finger section.
The configuration according to the invention offers the advantage, particularly if there is a sufficiently small spacing of the contact area sections from the active region of the transistor and a suitably thick metallizing of the electrode terminal connection regions, and above all of the vias, of enabling a considerable reduction in the effective heat resistance. Accordingly, the heat produced because of the electrical power loss, especially in the active region of the transistor, can be better dissipated. In this respect it should be noted that metals generally have a heat conductivity that is far better, by more than one order of magnitude, than the usual semiconductor materials (Si or GaAs) so that even thin metal films can enable a substantial decrease in the thermal resistance.
In accordance with an added feature of the invention, at least one electrode terminal connection region, whose contact area section is disposed on the one side of the finger sections, has a further finger section that is electrically connected to this contact area section and/or to the associated further contact area section. The further finger section can open into a widening portion electrically connected to it, which portion is disposed on the opposite side with respect to the finger sections and has a width that is at least somewhat increased compared with the other finger section. It may advantageously be provided that the further finger section is electrically connected via a bar to the finger section and/or the further contact area section on the opposite side of the finger sections of the associated electrode terminal connection region. Moreover, it may be provided in detail that the finger section of a contact area section located on the opposite side of the finger sections and closest to the bar, of an adjacent electrode terminal connection region is embodied so as to cross over the bar in an electrically insulating way, forming a crossing point.
In accordance with an additional feature of the invention, the electrode terminal connection region associated with the gate terminal or base terminal of the transistor has many finger sections, which are connected electrically conductively to the associated contact area section of the electrode terminal connection region associated with the gate terminal or base terminal of the transistor, and which extends parallel between the finger sections of the electrode terminal connection regions associated with the source terminal or emitter terminal and the drain terminal or collector terminal of the transistor.
In accordance with again an additional feature of the invention, the many finger sections of the electrode terminal connection region associated with the gate or base terminal of the transistor are connected via a supply line to the associated contact area section of the gate terminal or base terminal. It is advantageous if the finger section of the contact area section, disposed on one side of the finger sections, of an electrode terminal connection region is embodied so that it electrically insulatingly crosses over the supply line associated with the gate terminal or base terminal of the transistor, forming a crossing point.
In accordance with a further feature of the invention, the crossing points may be embodied as a metal/insulator layer/metal crossing (MIM crossing) or as an air bridge.
In accordance with again a further feature of the invention, the one group of contact area sections of the electrode terminal connection regions that is associated with the source terminal or emitter terminal of the transistors and the contact area section of the electrode terminal connection regions that is associated with the gate terminal or base terminal of the transistors are aligned in alternation and in one row on one side with respect to the finger sections, and the further contact area sections of the electrode terminal connection regions associated with the source terminal or emitter terminal of the transistors, end the contact area sections of the electrode terminal connection regions associated with the drain terminal or collector terminal of the transistors, are aligned in one row alternatingly on the opposite side of the finger sections.
In an especially preferred embodiment of the semiconductor component according to the invention, the connection to those finger sections that are associated with the source or emitter terminal connection region is carried over the supply line leading to the gate terminal or base terminal, forming an insulating crossing point, and at the same time on the opposite side with respect to the finger sections, forming likewise insulating crossing points, is carried in the form of bars under the supply lines belonging to the third electrode terminal connection region (which is associated with the drain or collector terminal of the transistor).
The terminal or crossing configuration of the semiconductor component of the invention makes substantially more-effective heat dissipation possible, which would otherwise require the use of maximum metallizing thicknesses for the supply leads. Following the principle of the invention, to connect the inner FET cells (which form the actual active FET region) to the external surroundings, in this case the contact area sections, advantageously two types of line crossings are used: On the side of the gate terminal or base terminal (that is, on the one side of the finger sections), a connecting metal plane, as the source terminal or emitter terminal, crosses the gate or base supply lead; on the drain terminal or collector terminal side (that is, on the opposite side with respect to the finger sections), this same connecting metal plane for example this type, acting as a drain terminal or collector terminal, crosses the source or emitter supply lead, which here might, in the crossing region, for instance comprise merely ohmic metal. Moreover, the crossing metals below may be reinforced with an additional connecting metal plane, should that appear useful for reasons of resistance or electron migration.
In accordance with yet a further feature of the invention, the one group of contact area sections and/or the further contact area sections of the electrode terminal connection region associated with the source terminal or emitter terminal of the at least one transistor have a substrate through-plating. In this way, the inductance to the back side can advantageously be minimized in the through-plating, especially of high-impedance substrates. The ground inductance can in particular be further minimized on both sides of the finger sections in an embodiment with two rows of substrate through-plating (rows of via-holes); the area required is only slightly greater than in the conventional configuration with only one row of via-holes on only one side of the finger sections. If these via-holes are disposed close enough to the active region (spacing on the order of magnitude of the substrate thickness or less), then the thermal resistance to the heat sink (back side of the semiconductor substrate) is markedly reduced, especially in the case of an configuration on both sides of the finger sections or the center line of the contact area sections associated with the source terminal or emitter terminal of the transistor.
Both effects, in this embodiment of the semiconductor component according to the invention, that is, the minimization of inductance to the back side in the case of the via-holes and the reduction in the heat resistance, can be attained together but can also be employed independently of one another; for instance, better heat dissipation is more important particular in power applications, while minimized source inductance plays a greater role in low-noise components, for instance.
Extending the terminals to the outer contact area sections or pads as provided by the invention thus makes it possible, especially in the inner FET cells as well, to line both the source or emitter faces and the drain or collector faces fully with the connecting metal plane or planes, so that on all the fingers the electrical conductivity and current-carrying capacity are increased, and electron migration problems in the final analysis are at least reduced.
The semiconductor component of the invention is used in FETs, bipolar transistors and similar components, and especially for high-frequency applications and monolithically integrated circuits that contain such components. In terms of the names used for them, the components associated with the source or emitter portion may be transposed with the components assigned to the drain or collector portion or to the gate terminal or base terminal; for instance, the outer contact area sections or pads in the corresponding pad rows may also comprise gate portions or drain portions instead of source portions. Instead of the source vias, source pads can also be used; naturally, the aspect of thermal resistance does not exist for the via. Nevertheless, once again there are thermal advantages because of the larger metallized surface area and along with this better heat distribution on the surface of the semiconductor substrate.
The advantages according to the invention apply both for a basic chip (with only one drain and gate pad or terminal each), for many-finger structures (xe2x80x9carbitrarilyxe2x80x9d many gate and drain pads), and for MMICs with corresponding FET cells and other comparable semiconductor components.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor component, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.